December 26, 2012
Optimum for affordable display devices supporting networks in the cloud-computing era
Panasonic develops the PH1-sLD8 system LSI for smart devices, balancing competing goals of high performance and simple design
Samples will be shipped in January 2013
December 26, 2012, Osaka, Japan－System LSI Business Unit of Panasonic Corporation has developed the PH1-sLD8 system LSI (model number: MN2WS0270 series) for affordable models of smart devices. Its new distributed processing architecture will help to achieve high processing capabilities with footprint downsizing. Samples will be shipped in January 2013.
This product will streamline smart devices capable of displaying TV broadcasting, various AV contents and cloud-computing services over the Internet. This low-power-consumption and space-saving product contributes to the expansion of smart devices in a variety of fields, such as in-vehicle equipment.
This product offers strong advantages:
- We have optimized our unique software architecture for affordable models of smart devices to achieve a performance comparable to that of high-end smart devices in terms of application processing and display of AV contents over the Internet.
- The functions needed for smart devices are integrated into a single chip. The power consumption of the signal-processing circuit can be reduced by approximately 30%(*1). The footprint of a smart device can be reduced by approximately 60%(*1) by about 50%(*1) reduction of the number of components required for a smart device etc. As a result, smart devices can be down-sized and thinned-down while reducing power consumption. Such smart devices can even be deployed in in-vehicle equipment and other environments where space is at a premium.
- Optimum image compensation can be applied to various video images to be distributed over the Internet or by other means, depending on the transmission rate. Therefore, high-quality video can always be displayed without disrupting the viewer’s experience.
This product was developed using key Panasonic technologies:
- A technology based on a distributed processing software architecture reduces the load on the high-speed application processing CPU (ARM(R)(*2) Cortex(TM)(*2)-A9) by assigning part of application processing to IPP3 high-speed parallel media processor, which can process AV content in real time.
- Voltage control technologies absorb variations in LSI manufacturing and in the printed circuit board, thus reducing the power consumption of the LSI. Furthermore, our design technologies reduce the scale of circuits constituting the system LSI.
- Video signal processing technologies, featuring our unique super resolution technology, are combined with control technologies capable of controlling the image-compensation factor on a real-time basis upon detecting the transmission rate.
In order to achieve smart devices, on which AV contents over the Internet or various cloud computing services can be enjoyed, it was necessary to implement high performance system LSIs, such as dual-core CPUs with a GHz-level operating frequency.
Sample shipment starts January 2013
Sample pricing depends on quantity
(*1) Compared with our conventional model MN2WS0220
(*2 )“ARM” and “Cortex” are registered trademarks or trademarks of ARM Company, U.K.