Kazuko Nishimura

Major:Semiconductor, Analog circuit design
Keyword:Image sensor, High-speed A/D converter
Affiliated academic society: -

Kazuko Nishimura


She received the B.E. degree in mechanical engineering from Osaka university, Japan, in 1995. In the university laboratory, she studied the optimization of robot manipulators using GA (Genetic Algorithm) algorithm. In the same year, she joined Panasonic Co. (Matsushita Electric Industrial Co.). After joining the company, she was engaged in the development of high-speed A / D converters for digital read channel, high-speed optical communication LSIs for FTTH etc. at Semiconductor Research Center. During this period, she got a real sense of accomplishment in both field of pursuit of advanced technology research and commercial development. Since 2006, at Strategic Semiconductor Development Center, she has developed A / D converters for image sensors which are substitute for visual, one of five human senses. Since 2013, as a design leader at Advanced Research Division, she has been promoting the development of "Organic Photoconductive Film CMOS Image Sensors"" that have a new pixel structure completely different from the conventional structure contributing to next-generation imaging / sensing applications. In the near future, as people's lives are changing, such as using automatic driving, coexistence with autonomous robots, communication between machines, she will try to realize viewing, examining and predicting beyond human vision. She aims to provide technologies, products and systems that change people's lives safely and comfortably.



  • 1999 IEICE "PLL circuit for 50 Mb/s burst signal with head data detection function and high sensitivity optical receiver"
  • 2000 ISSCC "A 6 b 800 MSample/s CMOS A/D converter"
  • 2002 ISSCC "An 800 Mb/s physical layer LSI with hybrid port architecture for consumer electronics networking"
  • 2002 IEICE "Development of 800 Mb/s physical layer LSI for consumer network with hybrid port architecture"
  • 2003 IEICE "Development of 1.25Gbit/s Burst Mode Optical Receiver IC with 0.25μm CMOS"
  • 2004 IEICE "Development of burst mode extinction ratio control method"
  • 2004 VLSI Symposium "A 1.25Gbit/s CMOS Burst-Mode Optical Transceiver for Ethernet PON System"
  • 2004 IEICE "Development of 1.25Gbit/s burst mode optical transceiver LSI using 0.25μm CMOS"
  • 2005 JSSC "A 1.25Gbit/s CMOS Burst-Mode Optical Transceiver for Ethernet PON System"
  • 2007 IEICE "Investigation of optical transmission technology in the information appliances"
  • 2016 ISSCC "An Over 120dB Simultaneous-Capture Wide-Dynamic-Range 1.6e- Ultra-Low-Reset-Noise Organic-Photoconductive-Film CMOS Image Sensor"
  • 2018 ISSCC "An 8K4K Resolution 60fps 450ke– Saturation Signal Organic Photoconductive Film Global Shutter CMOS Image Sensor with In-Pixel Noise Canceller"


  • TIA, GCA, LDD circuits and driving methods for optical communication, A/D convertors for image sensor, etc. First-author 29 papers, Co-author 27 papers


  • IEEE Asian Solid-State Circuits Conference Technical Program Committee
  • 2016 Osaka University Symposium "Form of new collaboration for co-creation" Panelist